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MAX9249

Gigabit Multimedia Serial Link

Serializer with LVDS System Interface

Detailed Description

The MAX9249 serializer with LVDS system interface

utilizes Maxim’s GMSL technology. The MAX9249 serial-

izer pairs with any GMSL deserializer to form a complete

digital serial link for joint transmission of high-speed

video, audio, and control data.

The MAX9249 allows a maximum serial payload data

rate of 2.5Gbps for a greater than 15m STP cable. The

serializer operates up to a maximum clock of 104MHz for

a 3-channel LVDS input or 78MHz for a 4-channel LVDS

input. This serial link supports display panels from QVGA

(320 x 240) up to WXGA (1280 x 800) with 24-bit color.

The 3-channel mode handles three lanes of LVDS data

(21 bits), UART control signals, and three audio signals.

The 4-channel mode handles four lanes of LVDS data

(28 bits), UART control signals, three audio signals, and/

or up to three auxiliary parallel inputs. The three audio

inputs form a standard I

S interface, supporting sample

rates from 8kHz to 192kHz and audio word lengths of

4 to 32 bits. The embedded control channel forms a

full-duplex, differential, 100kbps to 1Mbps UART link

between the serializer and deserializer. The ECU, or FC,

can be located on the MAX9249 side of the link (typical

for video display), on the deserializer side of the link (typ-

ical for image sensing), or on both sides. In addition, the

control channel enables ECU/FC control of peripherals

in the remote side, such as backlight control, grayscale

Gamma correction, camera module, and touch screen.

Base-mode communication with peripherals uses either

C or the GMSL UART format. A bypass mode enables

full-duplex communication using custom UART formats.

The MAX9249 serializer driver preemphasis, along with

the channel equalizer on the GMSL deserializer, extends

the link length and enhances the link reliability. Spread

spectrum is available on the MAX9249 to reduce EMI on

the serial link and the parallel output of the GMSL dese-

rializer. The serial output complies with ISO 10605 and

IEC 61000-4-2 ESD protection standards.

The FC configures various operating conditions of the

MAX9249 and GMSL deserializer through internal regis-

ters. The default device addresses stored in the R0 and

R1 registers of both the MAX9249 and GSML deserial-

izer are 0x80 and 0x90, respectively. Write to the R0/R1

registers in both devices to change the device address

of the MAX9249 or GMSL deserializer.

Table 1. Power-Up Default Register Map (see Table 12)

ADDRESS

(HEX)

POWER-UP

DEFAULT

(HEX)

POWER-UP DEFAULT SETTINGS

(MSB FIRST)

0x00 0x80

SERID =1000000, serializer device address is 1000 000

RESERVED = 0

0x01 0x90

DESID =1001000, deserializer device address is 1001 000

RESERVED = 0

0x02 0x1F, 0x3F

SS = 000 (SSEN = low), SS = 001 (SSEN = high), spread-spectrum settings depend on

SSEN pin state at power-up

AUDIOEN = 1, I

S channel enabled

PRNG = 11, automatically detect the pixel clock range

SRNG = 11, automatically detect serial-data rate

0x03 0x00

AUTOFM = 00, calibrate spread-modulation rate only once after locking

SDIV = 000000, autocalibrate sawtooth divider

1 2 ... 10 11 12 13 14 15 16 17 18 19 20 ... 35 36

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